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general description the max3372e?ax3379e and max3390e?ax3393e ?5kv esd-protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system. externally applied voltages, v cc and v l , set the logic levels on either side of the device. a low-voltage logic signal present on the v l side of the device appears as a high-voltage logic signal on the v cc side of the device, and vice-versa. the max3374e/max3375e/ max3376e/max3379e and max3390e?ax3393e unidi- rectional level translators level shift data in one direction (v l v cc or v cc v l ) on any single data line. the max3372e/max3373e and max3377e/max3378e bidi- rectional level translators utilize a transmission-gate- based design (figure 2) to allow data translation in either direction (v l ? v cc ) on any single data line. the max3372e?ax3379e and max3390e?ax3393e accept v l from +1.2v to +5.5v and v cc from +1.65v to +5.5v, making them ideal for data transfer between low- voltage asics/plds and higher voltage systems. all devices in the max3372e?ax3379e, max3390e max3393e family feature a three-state output mode that reduces supply current to less than 1?, thermal short- circuit protection, and ?5kv esd protection on the v cc side for greater protection in applications that route sig- nals externally. the max3372e/max3377e operate at a guaranteed data rate of 230kbps. slew-rate limiting reduces emi emissions in all 230kbps devices. the max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e operate at a guaranteed data rate of 8mbps over the entire specified operating voltage range. within specific voltage domains, higher data rates are possible. (see the timing characteristics table.) the max3372e?ax3376e are dual level shifters available in 3 x 3 ucsp, 8-pin tdfn, and 8-pin sot23-8 packages. the max3377e/max3378e/ max3379e and max3390e?ax3393e are quad level shifters available in 3 x 4 ucsp, 14-pin tdfn, and 14- pin tssop packages. ________________________applications spi, microwire , and i 2 c level translation low-voltage asic level translation smart card readers cell-phone cradles portable pos systems portable communication devices low-cost serial interfaces cell phones gps telecommunications equipment features guaranteed data rate options 230kbps 8mbps (+1.2v v l v cc +5.5v) 10mbps (+1.2v v l v cc +3.3v) 16mbps (+1.8v v l v cc +2.5v and +2.5v v l v cc +3.3v) bidirectional level translation (max3372e/max3373e and max3377e/max3378e) operation down to +1.2v on v l ?5kv esd protection on i/o v cc lines ultra-low 1a supply current in three-state output mode low-quiescent current (130 a typ) ucsp, tdfn, sot23, and tssop packages thermal short-circuit protection ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i/0 v cc 1 i/0 v cc 2 n.c. n.c. i/o v l 2 i/o v l 1 max3377e/ max3378e v l i/0 v cc 3 gnd i/o v l 4 i/o v l 3 tdfn-14 (3mm x 3mm) three-state i/0 v cc 4 top view + pin configurations 19-2328; rev 3; 1/13 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maximintegrated.com. max3372e?ax3379e/ max3390e?ax3393e ordering information ucsp is a trademark of maxim integrated products, inc. microwire is a registered trademark of national semiconductor corp. ordering information continued at end of data sheet. selector guide appears at end of data sheet. pin configurations continued at end of data sheet. part temp range pin- package max3372e eka+t -40? to +85? 8 sot23 + denotes a lead-free package. t = tape and reel.
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 2 maxim integrated absolute maximum ratings electrical characteristics (v cc = +1.65v to +5.5v, v l = +1.2v to (v cc + 0.3v), gnd = 0, i/o v l_ and i/o v cc_ unconnected, t a = t min to t max , unless other- wise noted. typical values are at v cc = +3.3v, v l = +1.8v, t a = +25?.) (notes 1, 2) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd.) v cc ...........................................................................-0.3v to +6v i/o v cc_ ......................................................-0.3v to (v cc + 0.3v) i/o v l_ ...........................................................-0.3v to (v l + 0.3v) three-state ...............................................-0.3v to (v l + 0.3v) short-circuit duration i/o v l , i/o v cc to gnd...........continuous short-circuit duration i/o v l or i/o v cc to gnd driven from 40ma source (except max3372e and max3377e) .....................continuous continuous power dissipation (t a = +70?) 8-pin sot23 (derate 5.6mw/? above +70?)........444.4mw 8-pin tdfn (derate 18.5mw/? above +70?) ........1482mw 3 x 3 ucsp (derate 4.7mw/? above +70?) ............379mw 3 x 4 ucsp (derate 6.5mw/? above +70?) ............520mw 14-pin tssop (derate 9.1mw/? above +70?) ........727mw 14-pin tdfn (derate 18.5mw/? above +70?) ......1482mw operating temperature range ...........................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? parameter symbol conditions min typ max units power supplies v l supply range v l 1.2 5.5 v v cc supply range v cc 1.65 5.50 v supply current from v cc i qv cc 130 300 ? supply current from v l i qv l 16 100 ? v cc three-state output mode supply current i three-state-vcc t a = +25 c, three-state = gnd 0.03 1 a v l three-state output mode supply current i three-state-vl t a = +25 c, three-state = gnd 0.03 1 a three-state output mode leakage current i/o v l_ and i/o v cc_ i three-state-lkg t a = +25 c, three-state = gnd 0.02 1 a three-state p in inp ut leakag et a = +25 c 0.02 1 a esd protection iec 1000-4-2 air-gap discharge ? iec 1000-4-2 contact discharge ? i/o v cc (note 3) human body model ?5 kv logic-level thresholds (max3372e/max3377e) i/o v l_ input-voltage high v ihl v l - 0.2 v i/o v l_ input-voltage low v ill 0.15 v
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 3 maxim integrated electrical characteristics (continued) (v cc = +1.65v to +5.5v, v l = +1.2v to (v cc + 0.3v), gnd = 0, i/o v l_ and i/o v cc_ unconnected, t a = t min to t max , unless other- wise noted. typical values are at v cc = +3.3v, v l = +1.8v, t a = +25?.) (notes 1, 2) parameter symbol conditions min typ max units i/o v cc_ input-voltage high v ihc v cc - 0.4 v i/o v cc_ input-voltage low v ilc 0.15 v i/o v l_ output-voltage high v ohl i/o v l_ source current = 20?, i/o v cc_ > v cc - 0.4v 0.67 ? v l v i/o v l_ output-voltage low v oll i/o v l_ sink current = 20?, i/o v cc_ < 0.15v 0.4 v i/o v cc_ output-voltage high v ohc i/o v cc_ source current = 20?, i/o v l _ > v l - 0.2v 0.67 ? v cc v i/o v cc_ output-voltage low v olc i/o v cc_ sink current = 20?, i/o v l_ < 0.15v 0.4 v three-state input-voltage high v il- three-state v l - 0.2 v three-state input-voltage low v il- three-state 0.15 v logic-level thresholds (max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e) i/o v l_ input-voltage high v ihl v l - 0.2 v i/o v l_ input-voltage low v ill 0.15 v i/o v cc_ input-voltage high v ihc v cc - 0.4 v i/o v cc_ input-voltage low v ilc 0.15 v i/o v l_ output-voltage high v ohl i/o v l_ source current = 20?, i/o v cc_ v cc - 0.4v 0.67 ? v l v i/o v l_ output-voltage low v oll i/o v l_ sink current = 1ma, i/o v cc_ 0.15v 0.4 v i/o v cc_ output-voltage high v ohc i/o v cc_ source current = 20?, i/o v l_ v l - 0.2v 0.67 ? v cc v i/o v cc_ output-voltage low v olc i/o v cc_ sink current = 1ma, i/o v l_ 0.15v 0.4 v three-state input-voltage high v ih- three-state v l - 0.2 v three-state input-voltage low v il- three-state 0.15 v
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 4 maxim integrated timing characteristics (v cc = +1.65v to +5.5v, v l = +1.2v to (v cc + 0.3v), gnd = 0, r load = 1m, i/o test signal of figure 1, t a = t min to t max , unless otherwise noted. typical values are at v cc = +3.3v, v l = +1.8v, t a = +25?, unless otherwise noted.) (notes 1, 2) parameter sym b o l conditions min typ max units max3372e/max3377e (c load = 50pf) i/o v cc _ rise time (note 4) t rvcc 1100 ns i/o v cc _ fall time (note 5) t fvcc 1000 ns i/o v l _ rise time (note 4) t rvl 600 ns i/o v l _ fall time (note 5) t fvl 1100 ns i/o vl-vcc driving i/o v l _ 1.6 propagation delay i/o vcc-vl driving i/o v cc _ 1.6 ? channel-to-channel skew t skew each translator equally loaded 500 ns maximum data rate c l = 25pf 230 kbps m a x3 3 7 3 e m a x3 3 7 6 e/m a x3 3 7 8 e/ m a x3 3 7 9 e a n d m a x3 3 9 0 e m a x3 3 9 3 e ( c loa d = 15 p f , dr iv e r o u t p u t im p e d a n c e 5 0 ) +1.2v v l v cc +5.5v 725 i/o v cc _ rise time (note 4) t rvcc open-drain driving 170 400 ns 637 i/o v cc _ fall time (note 5) t fvcc open-drain driving 20 50 ns 830 i/o v l _ rise time (note 4) t rvl open-drain driving 180 400 ns 330 i/o v l _ fall time (note 5) t lfv open-drain driving 30 60 ns 530 i/o vl-vcc driving i/o v l _ open-drain driving 210 1000 430 propagation delay i/o vcc-vl driving i/o v cc _ open-drain driving 190 1000 ns 20 channel-to-channel skew t skew each translator equally loaded open-drain driving 50 ns 8 mbps maximum data rate open-drain driving 500 kbps
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 5 maxim integrated note 1: all units are 100% production tested at t a = +25?. limits over the operating temperature range are guaranteed by design and not production tested. note 2: for normal operation, ensure v l < (v cc + 0.3v). during power-up, v l > (v cc + 0.3v) will not damage the device. note 3: to ensure maximum esd protection, place a 1? capacitor between v cc and gnd. see applications circuits . note 4: 10% to 90% note 5: 90% to 10% timing characteristics (continued) (v cc = +1.65v to +5.5v, v l = +1.2v to (v cc + 0.3v), gnd = 0, r load = 1m, i/o test signal of figure 1, t a = t min to t max , unless otherwise noted. typical values are at v cc = +3.3v, v l = +1.8v, t a = +25?, unless otherwise noted.) (notes 1, 2) parameter sym b o l conditions min typ max units +1.2v v l v cc +3.3v i/o v cc _ rise time (note 4) t rvcc 25 ns i/o v cc _ fall time (note 5) t fvcc 30 ns i/o v l _ rise time (note 4) t rvl 30 ns i/o v l _ fall time (note 5) t fvl 30 ns i/o vl-vcc driving i/o v l _2 0 propagation delay i/o vcc-vl driving i/o v cc _2 0 ns channel-to-channel skew t skew each translator equally loaded 10 ns maximum data rate 10 mbps +2.5v v l v cc +3.3v i/o v cc _ rise time (note 4) t rvcc 15 ns i/o v cc _ fall time (note 5) t fvcc 15 ns i/o v l _ rise time (note 4) t rvl 15 ns i/o v l _ fall time (note 5) t fvl 15 ns i/o vl-vcc driving i/o v l _1 5 propagation delay i/o vcc-vl driving i/o v cc _1 5 ns channel-to-channel skew t skew each translator equally loaded 10 ns maximum data rate 16 mbps +1.8v v l v cc +2.5v i/o v cc _ rise time (note 4) t rvcc 15 ns i/o v cc _ fall time (note 5) t fvcc 15 ns i/o v l _ rise time (note 4) t rvl 15 ns i/o v l _ fall time (note 5) t fvl 15 ns i/o vl-vcc driving i/o v l _1 5 propagation delay i/o vcc-vl driving i/o v cc _1 5 ns channel-to-channel skew t skew each translator equally loaded 10 ns maximum data rate 16 mbps
typical operating characteristics (r load = 1m, t a = +25?, unless otherwise noted. all 230kbps tocs apply to max3372e/max3377e only. all 8mbps and 500kbps tocs apply to max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e only.) v l supply current vs. supply voltage (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc01 v cc (v) supply current ( a) 4.95 4.40 3.85 3.30 2.75 2.20 100 200 300 400 500 600 0 1.65 5.50 8mbps, c load = 15pf 230kbps, c load = 50pf 500kbps, open-drain, c load = 15pf v cc supply current vs. supply voltage (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc02 v cc (v) supply current (ma) 4.95 4.40 3.85 3.30 2.75 2.20 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 1.65 5.50 8mbps, c load = 15pf 230kbps, c load = 50pf 500kbps, open-drain, c load = 15pf v l supply current vs. temperature (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc03 temperature ( c) supply current ( a) 60 35 -15 10 50 100 150 200 250 300 350 400 0 -40 85 8mbps, c load = 15pf 230kbps, c load = 50pf 500kbps, open-drain, c load = 15pf v cc supply current vs. temperature (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc04 temperature (c) supply current ( a) 60 35 -15 10 200 400 600 800 1000 1200 1400 1600 0 -40 85 8mbps, c load = 15pf 230kbps, c load = 50pf 500kbps, open-drain, c load = 15pf v l supply current vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc05 capacitive load (pf) supply current ( a) 85 70 55 40 25 50 100 150 200 250 300 350 0 10 100 8mbps 230kbps 500kbps, open-drain v cc supply current vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc06 capacitive load (pf) supply current ( a) 85 70 55 40 25 500 1000 1500 2000 2500 0 10 100 8mbps 230kbps 500kbps, open-drain rise/fall time vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc07 capacitive load (pf) rise/fall time (ns) 90 80 70 60 50 40 30 500 1000 1500 2000 2500 0 20 100 data rate = 230kbps t hl t lh rise/fall time vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc08 capacitive load (pf) rise/fall time (ns) 45 40 30 35 20 25 15 2 4 6 8 10 12 14 16 18 0 10 50 data rate = 8mbps t hl t lh rise/fall time vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc09 capacitive load (pf) rise/fall time (ns) 45 40 35 30 25 20 15 50 100 150 200 250 0 10 50 t lh t hl data rate = 500kbps, open-drain max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 6 maxim integrated
propagation delay vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc10 capacitive load (pf) propagation delay (ns) 90 80 70 60 50 40 30 100 200 300 400 500 600 700 0 20 100 data rate = 230kbps t phl t plh propagation delay vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc11 capacitive load (pf) propagation delay (ns) 45 40 35 30 25 20 15 3 6 9 12 15 0 10 50 data rate = 8mbps t plh t phl propagation delay vs. capacitive load (driving i/o v l , v cc = +3.3v, v l = +1.8v) max3372e toc12 capacitive load (pf) propagation delay (ns) 45 40 35 30 25 20 15 50 100 150 200 250 300 0 10 50 data rate = 500kbps, open-drain t phl t plh rise/fall time vs. capacitive load (driving i/o v l , v cc = +2.5v, v l = +1.8v) max3372e toc13 capacitive load (pf) rise/fall time (ns) 90 80 70 60 50 40 30 500 1000 1500 2000 2500 0 20 100 data rate = 230kbps t hl t lh rise/fall time vs. capacitive load (driving i/o v l , v cc = +2.5v, v l = +1.8v) max3372e toc14 capacitive load (pf) rise/fall time (ns) 45 40 35 30 25 20 15 2 4 6 8 10 12 14 0 10 50 data rate = 8mbps t lh t hl rise/fall time vs. capacitive load (driving i/o v cc , v cc = +2.5v, v l = +1.8v) max3372e toc15 capacitive load (pf) rise/fall time (ns) 45 40 35 30 25 20 15 50 100 150 200 250 300 0 10 50 data rate = 500kbps, open-drain t hl t lh rise/fall time vs. capacitive load (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc16 capacitive load (pf) rise/fall time (ns) 90 80 70 60 50 40 30 500 1000 1500 2000 2500 0 20 100 data rate = 230kbps t lh t hl rise/fall time vs. capacitive load (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc17 capacitive load (pf) rise/fall time (ns) 45 40 35 30 25 20 15 2 4 6 8 10 12 0 10 50 data rate = 8mbps t hl t lh rise/fall time vs. capacitive load (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc18 capacitive load (pf) rise/fall time (ns) 45 40 35 30 25 20 15 50 100 150 200 250 300 0 10 50 data rate = 500kbps, open-drain t hl t lh typical operating characteristics (continued) (r load = 1m, t a = +25?, unless otherwise noted. all 230kbps tocs apply to max3372e/max3377e only. all 8mbps and 500kbps tocs apply to max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e only.) max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 7 maxim integrated
typical operating characteristics (continued) (r load = 1m, t a = +25?, unless otherwise noted. all 230kbps tocs apply to max3372e/max3377e only. all 8mbps and 500kbps tocs apply to max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e only.) propagation delay vs. capacitive load (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc19 capacitive load (pf) propagation delay (ns) 90 80 70 60 50 40 30 100 200 300 400 500 600 700 0 20 100 data rate = 230kbps t phl t phl propagation delay vs. capacitive load (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc20 capacitive load (pf) propagation delay (ns) 45 40 35 30 25 20 15 1 2 3 4 5 6 0 10 50 data rate = 8mbps t plh t phl propagation delay vs. capacitive load (driving i/o v cc , v cc = +3.3v, v l = +1.8v) max3372e toc21 capacitive load (pf) propagation delay (ns) 45 40 35 30 25 20 15 50 100 150 200 250 300 0 10 50 data rate = 500kbps, open-drain t phl t plh rise/fall time vs. capacitive load (driving i/o v cc , v cc = +2.5v, v l = +1.8v) max3372e toc22 capacitive load (pf) rise/fall time (ns) 90 80 70 60 50 40 30 500 1000 1500 2000 2500 0 20 100 data rate = 230kbps t lh t hl rise/fall time vs. capacitive load (driving i/o v cc , v cc = +2.5v, v l = +1.8v) max3372e toc23 capacitive load (pf) rise/fall time (ns) 40 30 20 2 4 6 8 10 12 0 10 50 t lh t hl data rate = 8mbps rise/fall time vs. capacitive load (driving i/o v cc , v cc = +2.5v, v l = +1.8v) max3373e toc24 capacitive load (pf) rise/fall time (ns) 40 30 20 50 100 150 200 250 300 350 0 10 50 data rate = 500kbps, open-drain t lh t hl rail-to-rail driving (driving i/o v l , v cc = +3.3v, v l = +1.8v, c load = 50pf, data rate = 230kbps) max3372e toc25 i/o v l_ i/o v cc_ 1v/div 2v/div 1s/div rail-to-rail driving (driving i/o v l , v cc = +3.3v, v l = +1.8v, c load = 15pf, data rate = 8mbps) max3372e toc26 i/o v l_ i/o v cc_ 1v/div 2v/div 200ns/div max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 8 maxim integrated
typical operating characteristics (continued) (r load = 1m, t a = +25?, unless otherwise noted. all 230kbps tocs apply to max3372e/max3377e only. all 8mbps and 500kbps tocs apply to max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e only.) max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 9 maxim integrated exiting three-state output mode (v cc = +3.3v, v l = +1.8v, c load = 50pf) max3372e toc28 i/o v l_ i/o v cc_ 2s/div three-state 2v/div 1v/div 1v/div pin description pin 3 x 4 ucsp 14 tssop sot23-8 3 x 3 ucsp 8 tdfn- ep 14 tdfn- ep name function a1 2 5 c2 6 1 i/o v l 1 input/output 1. referenced to v l . (note 6) a2 3 4 c3 8 2 i/o v l 2 input/output 2. referenced to v l . (note 6) a3 4 5 i/o v l 3 input/output 3. referenced to v l . (note 6) a4 5 6 i/o v l 4 input/output 4. referenced to v l . (note 6) b1 14 7 a1 4 14 v cc v cc input voltage +1.65v v cc +5.5v. b2 1 3 c1 7 10 v l logic input voltage +1.2v v l (v cc + 0.3v) b3 8 6 b1 5 3 three- state thr ee- s tate outp ut m od e e nab l e. p ul l thre e - s tate l ow to p l ace d evi ce i n thr ee- state outp ut m od e. i/o v c c _ and i/o v l_ ar e hi g h i m p ed ance i n thr ee- state outp ut m od e. n o t e : log i c r efer enced to v l ( for l og i c thr eshol d s see the e l ectr i cal c har acter i sti cs tab l e) . b4 7 2 b3 2 7 gnd ground c1 13 8 a2 3 13 i/o v cc 1 input/output 1. referenced to v cc . (note 6) c2 12 1 a3 1 12 i/o v cc 2 input/output 2. referenced to v cc . (note 6) c3 11 9 i/o v cc 3 input/output 3. referenced to v cc . (note 6) c4 10 8 i/o v cc 4 input/output 4. referenced to v cc . (note 6) 6, 9 b2 4, 11 n.c. no connection. not internally connected. ep exposed pad. connect ep to ground. note 6: for unidirectional devices (max3374e/max3375e/max3376e/max3379e and max3390e?ax3393e) see the pin configurations for input/output configurations. open-drain driving (driving i/o v l , v cc = +3.3v, v l = +1.8v, c load = 15pf, data rate = 500kbps) max3372e toc27 i/o v l_ i/o v cc_ 1v/div 2v/div 200ns/div
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 10 maxim integrated detailed description the max3372e?ax3379e and max3390e?ax3393e esd-protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system. externally applied voltages, v cc and v l , set the logic lev- els on either side of the device. a low-voltage logic signal present on the v l side of the device appears as a high- voltage logic signal on the v cc side of the device, and vice-versa. the max3374e/max3375e/max3376e/ max3379e and max3390e?ax3393e unidirectional level translators level shift data in one direction (v l v cc or v cc v l ) on any single data line. the max3372e/max3373e and max3377e/max3378e bidi- rectional level translators utilize a transmission-gate- based design (see figure 2) to allow data translation in either direction (v l ? v cc ) on any single data line. the max3372e?ax3379e and max3390e?ax3393e accept v l from +1.2v to +5.5v and v cc from +1.65v to +5.5v, making them ideal for data transfer between low- voltage asics/plds and higher voltage systems. all devices in the max3372e?ax3379e, max3390e max3393e family feature a three-state output mode that reduces supply current to less than 1?, thermal short- circuit protection, and ?5kv esd protection on the v cc side for greater protection in applications that route sig- nals externally. the max3372e/max3377e operate at a guaranteed data rate of 230kbps. slew-rate limiting reduces emi emissions in all 230kbps devices. the max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e operate at a guaranteed data rate of 8mbps over the entire specified operating voltage range. within specific voltage domains, higher data rates are possible. (see the timing characteristics table.) max3372e?max3379e and max3390e?max3393e i/o v l _ i/o v l _ (t rise , t fall < 10ns) data i/o v cc _ r load c load v cc v cc v l v l gnd t pd-vcc-lh t pd-vcc-hl i/o v cc _ t rvcc t fvcc figure 1a. rail-to-rail driving i/o v l max3372e?max3379e and max3390e?max3393e i/o v l _ i/o v cc _ (t rise , t fall < 10ns) data i/o v cc _ v cc v cc v l v l gnd r load c load t pd-vl-lh t pd-vl-hl i/o v l _ t rvl t fvl figure 1b. rail-to-rail driving i/o v cc
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 11 maxim integrated level translation for proper operation ensure that +1.65v v cc +5.5v, +1.2v v l +5.5v, and v l (v cc + 0.3v). during power-up sequencing, v l (v cc + 0.3v) will not damage the device. during power-supply sequenc- ing, when v cc is floating and v l is powering up, a cur- rent may be sourced, yet the device will not latch up. the speed-up circuitry limits the maximum data rate for devices in the max3372e?ax3379e, max3390e max3393e family to 16mbps. the maximum data rate also depends heavily on the load capacitance (see the typical operating characteristics ), output impedance of the driver, and the operational voltage range (see the timing characteristics table) . speed-up circuitry the max3373e?ax3376e/max3378e/max3379e and max3390e?ax3393e feature a one-shot generator that decreases the rise time of the output. when triggered, mosfets pu1 and pu2 turn on for a short time to pull up i/o v l_ and i/o v cc_ to their respective supplies (see figure 2b). this greatly reduces the rise time and propa- gation delay for the low-to-high transition. the scope photo of rail-to-rail driving for 8mbps operation in the typical operating characteristics shows the speed-up circuitry in operation. rise-time accelerators the max3373e?ax3376e/max3378e/max3379e and the max3390e?ax3393e have internal rise-time accelerators allowing operation up to 16mbps. the rise-time accelerators are present on both sides of the device and act to speed up the rise time of the input and output of the device, regardless of the direction of the data. the triggering mechanism for these accelera- tors is both level and edge sensitive. to prevent false triggering of the rise-time accelerators, signal fall times of less than 20ns/v are recommended for both the inputs and outputs of the device. under less noisy con- ditions, longer signal fall times may be acceptable. max3372e?max3379e and max3390e?max3393e i/o v l_ i/o v cc_ v cc v cc v l v l gnd i/o v cc_ t pd-vcc-lh t pd-vcc-hl i/o v l_ t rvcc t fvcc data r load c load figure 1c. open-drain driving i/o v cc max3373e?max3376e, max3378e/max3379e and max3390e?max3393e i/o v l_ i/o v cc_ data i/o v cc_ v cc v cc v l v l gnd r load c load t pd-vl-lh t pd-vl-hl i/o v l_ t rvl t fvl figure 1d. open-drain driving i/o v l
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 12 maxim integrated three-state output mode pull three-state low to place the max3372e max3379e and max3390e?ax3393e in three-state out- put mode. connect three-state to v l (logic-high) for normal operation. activating the three-state output mode disconnects the internal 10k pullup resistors on the i/o v cc and i/o v l lines. this forces the i/o lines to a high- impedance state, and decreases the supply current to less than 1?. the high-impedance i/o lines in three- state output mode allow for use in a multidrop network. when in three-state output mode, do not allow the voltage at i/o v l_ to exceed (v l + 0.3v), or the voltage at i/o v cc_ to exceed (v cc + 0.3v). thermal short-circuit protection thermal overload detection protects the max3372e max3379e and max3390e?ax3393e from short-circuit fault conditions. in the event of a short-circuit fault, when the junction temperature (t j ) reaches +152?, a thermal sensor signals the three-state output mode logic to force the device into three-state output mode. when t j has cooled to +142?, normal operation resumes. v cc i/o v l i/o v cc gate bias v l p p n figure 2a. functional diagram, max3372e/max3377e (1 i/o line) v cc i/o v l_ i/o v cc_ gate bias v l pu1 pu2 n one-shot block one-shot block figure 2b. functional diagram, max3373e/max3378e (1 i/o line)
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 13 maxim integrated charge-current- limit resistor discharge resistance storage capacitor c s 100pf r c 1m r d 1500 high- voltage dc source device- under- test figure 3a. human body esd test model i p 100% 90% 36.8% t rl time t dl current waveform peak-to-peak ringing (not drawn to scale) i r 10% 0 0 amperes figure 3b. human body current waveform ?5kv esd protection as with all maxim devices, esd-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. the i/o v cc lines have extra protection against static electricity. maxim? engineers have developed state-of- the-art structures to protect these pins against esd of ?5kv without damage. the esd structures withstand high esd in all states: normal operation, three-state output mode, and powered down. after an esd event, maxim? e versions keep working without latchup, whereas competing products can latch and must be powered down to remove latchup. esd protection can be tested in various ways. the i/o v cc lines of this product family are characterized for protection to the following limits: 1) ?5kv using the human body model 2) ?kv using the contact discharge method specified in iec 1000-4-2 3) ?0kv using iec 1000-4-2? air-gap discharge method esd test conditions esd performance depends on a variety of conditions. contact maxim for a reliability report that documents test setup, test methodology, and test results. human body model figure 3a shows the human body model and figure 3b shows the current waveform it generates when dis- charged into a low impedance. this model consists of a 100pf capacitor charged to the esd voltage of inter- est, which is then discharged into the test device through a 1.5k resistor. iec 1000-4-2 the iec 1000-4-2 standard covers esd testing and performance of finished equipment; it does not specifi- cally refer to integrated circuits. the max3372e max3379e and max3390e?ax3393e help to design equipment that meets level 3 of iec 1000-4-2, without the need for additional esd-protection components. the major difference between tests done using the human body model and iec 1000-4-2 is higher peak current in iec 1000-4-2, because series resistance is lower in the iec 1000-4-2 model. hence, the esd with- stand voltage measured to iec 1000-4-2 is generally lower than that measured using the human body model. figure 4a shows the iec 1000-4-2 model, and figure 4b shows the current waveform for the ?kv, iec 1000-4-2, level 4, esd contact-discharge test. the air-gap test involves approaching the device with a charged probe. the contact-discharge method con- nects the probe to the device before the probe is energized. machine model the machine model for esd tests all pins using a 200pf storage capacitor and zero discharge resis- tance. its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. of course, all pins require this protec- tion during manufacturing, not just inputs and outputs. therefore, after pcb assembly, the machine model is less relevant to i/o ports.
applications information power-supply decoupling to reduce ripple and the chance of transmitting incor- rect data, bypass v l and v cc to ground with a 0.1? capacitor. see the typical operating circuit. to ensure full ?5kv esd protection, bypass v cc to ground with a 1? capacitor. place all capacitors as close to the power-supply inputs as possible. i 2 c level translation the max3373e?ax3376e, max3378e/max3379e and max3390e?ax3393e level-shift the data present on the i/o lines between +1.2v and +5.5v, making them ideal for level translation between a low-voltage asic and an i 2 c device. a typical application involves interfacing a low-voltage microprocessor to a 3v or 5v d/a converter, such as the max517. push-pull vs. open-drain driving all devices in the max3372e?ax3379e and max3390e?ax3393e family may be driven in a push- pull configuration. the max3373e?ax3376e/ max3378e/max3379e and max3390e?ax3393e include internal 10k resistors that pull up i/o v l_ and i/o v cc_ to their respective power supplies, allowing operation of the i/o lines with open-drain devices. see the timing characteristics table for maximum data rates when using open-drain drivers. max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 14 maxim integrated t r = 0.7ns to 1ns 30ns 60ns t 100% 90% 10% i peak i figure 4b. iec 1000-4-2 esd generator current waveform charge-current- limit resistor discharge resistance storage capacitor c s 150pf r c 50m to 100m r d 330 high- voltage dc source device- under- test figure 4a. iec 1000-4-2 esd test model max3378e?max3383e three-state i/o v l_ data data i/o v cc_ 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l typical operating circuit
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 15 maxim integrated max3372e/max3373e three-state i/o v l2 i/o v l1 data data i/o v cc2 i/o v cc1 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l max3374e three-state i v l2 i v l1 data data o v cc1 o v cc2 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l applications circuits
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 16 maxim integrated applications circuits (continued) max3375e three-state i v l2 o v l1 data data o v cc2 i v cc1 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l max3376e three-state data data i v cc2 i v cc1 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l o v l2 o v l1
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 17 maxim integrated applications circuits (continued) max3377e/max3378e three-state i/o v l4 i/o v l3 i/o v l1 i/o v l2 data data i/o v cc1 i/o v cc2 i/o v cc3 i/o v cc4 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l max3379e three-state data data 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l i v l4 i v l3 i v l1 i v l2 o v cc1 o v cc2 o v cc3 o v cc4
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 18 maxim integrated applications circuits (continued) max3390e three-state data data 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l i v l4 o v l1 i v l2 i v l3 i v l1 o v cc2 o v cc3 o v cc4 max3391e three-state data data 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l i v l4 o v l1 o v l2 i v l3 i v cc1 i v cc2 o v cc3 o v cc4
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 19 maxim integrated applications circuits (continued) max3392e three-state data data 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l i v l4 o v l1 o v l2 o v l3 i v cc1 i v cc2 i v cc3 o v cc4 max3393e three-state data data 0.1f 0.1f 1f +3.3v +1.8v v cc +3.3v system +1.8v system controller v l i v l4 o v l1 o v l2 o v l3 i v cc1 i v cc2 i v cc3 i v cc4
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 20 maxim integrated ordering information (continued) part temp range pin- package max3372eebl+t -40? to +85? 9 ucsp (1.5mm x 1.5mm) max3372eeta+t -40? to +85? 8 tdfn-ep** (3mm x 3mm) max3373e eka+t -40? to +85? 8 sot23 max3373eebl+t -40? to +85? 9 ucsp (1.5mm x 1.5mm) max3373eeta+t -40? to +85? 8 tdfn-ep** (3mm x 3mm) max3374e eka+t -40? to +85? 8 sot23 max3374eebl+t -40? to +85? 9 ucsp (1.5mm x 1.5mm) max3374eeta+t -40? to +85? 8 tdfn-ep** (3mm x 3mm) max3375e eka+t -40? to +85? 8 sot23 max3375eebl+t -40? to +85? 9 ucsp (1.5mm x 1.5mm) max3375eeta+t -40? to +85? 8 tdfn-ep** (3mm x 3mm) max3376e eka+t -40? to +85? 8 sot23 max3376eebl+t -40? to +85? 9 ucsp (1.5mm x 1.5mm) max3376eeta+t -40? to +85? 8 tdfn-ep** (3mm x 3mm) max3377e eud+ -40? to +85? 14 tssop max3377eebc+t -40? to +85? 9 ucsp (1.5mm x 1.5mm) max3377eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) max3378e eud+ -40? to +85? 14 tssop part temp range pin- package max3378eebc+t -40? to +85? 12 ucsp (1.5mm x 2.0mm) max3378eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) max3379e eud+ -40? to +85? 14 tssop max3379eebc+t -40? to +85? 12 ucsp (1.5mm x 2.0mm) max3379eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) max3390e eud+ -40? to +85? 14 tssop max3390eebc+t -40? to +85? 12 ucsp (1.5mm x 2.0mm) max3390eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) max3391e eud+ -40? to +85? 14 tssop max3391eebc+t -40? to +85? 12 ucsp (1.5mm x 2.0mm) max3391eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) max3392e eud+ -40? to +85? 14 tssop max3392eebc+t -40? to +85? 12 ucsp (1.5mm x 2.0mm) max3392eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) max3393e eud+ -40? to +85? 14 tssop max3393eebc+t -40? to +85? 12 ucsp (1.5mm x 2.0mm) max3393eetd+t -40? to +85? 14 tdfn-ep** (3mm x 3mm) + denotes a lead-free package. ** ep = exposed pad. t = tape and reel.
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 21 maxim integrated selector guide part level trans- lation tx/ rx ? data rate top mark max3372eeka+t bi 2/2 aako max3372eebl+t bi 2/2 aar max3372eeta+t bi 2/2 230kbps aqg max3373eeka+t bi 2/2 aaks max3373eebl+t bi 2/2 aaz max3373eeta+t bi 2/2 aqh max3374eeka+t uni 2/0 aalh max3374eebl+t uni 2/0 aba max3374eeta+t uni 2/0 aqi max3375eeka+t uni 1/1 aali max3375eebl+t uni 1/1 abb max3375eeta+t uni 1/1 aqj max3376eeka+t uni 0/2 aalg max3376eebl+t uni 0/2 aav max3376eeta+t uni 0/2 8mbps* aqk max3377eeud+ bi 4/4 max3377eebc+t bi 4/4 aax max3377eetd+t bi 4/4 230kbps aag part level trans- lation tx/ rx ? data rate top mark max3378eeud+ bi 4/4 max3378eebc+t bi 4/4 aay max3378eetd+t bi 4/4 aah max3379eeud+ uni 4/0 max3379eebc+t uni 4/0 aaz max3379eetd+t uni 4/0 aai max3390eeud+ uni 3/1 max3390eebc+t uni 3/1 aba max3390eetd+t uni 3/1 aaj max3391eeud+ uni 2/2 max3391eebc+t uni 2/2 abb max3391eetd+t uni 2/2 aak max3392eeud+ uni 1/3 max3392eebc+t uni 1/3 abc max3392eetd+t uni 1/3 aal max3393eeud+ uni 0/4 max3393eebc+t uni 0/4 abd max3393eetd+t uni 0/4 8mbps* aam ? tx = v l v cc , rx = v cc v l * higher data rates are possible (see the timing characteristics table).
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 22 maxim integrated a 1 2 3 bc 9 ucsp (1.5mm x 1.5mm) bottom view v cc i v cc 1 i v cc 2 o v l 1 o v l 2 n.c. gnd v l three-state a 1 2 3 bc 9 ucsp (1.5mm x 1.5mm) bottom view v cc o v cc 1 i v cc 2 i v l 1 o v l 2 n.c. gnd v l three-state a 1 2 3 bc 9 ucsp (1.5mm x 1.5mm) bottom view v cc o v cc 1 o v cc 2 i v l 1 i v l 2 n.c. gnd v l three-state a 1 2 3 bc 9 ucsp (1.5mm x 1.5mm) bottom view v cc i/o v cc 1 i/o v cc 2 i/o v l 1 i/o v l 2 n.c. gnd v l three-state three-state i v l 1 i v l 2 1 2 8 7 o v cc 1 v cc gnd v l o v cc 2 sot23-8 top view 3 4 6 5 max3374e three-state o v l 1 i v l 2 1 2 8 7 i v cc 1 v cc gnd v l o v cc 2 sot23-8 top view 3 4 6 5 max3375e three-state o v l 1 o v l 2 1 2 8 7 i v cc 1 v cc gnd v l i v cc 2 sot23-8 top view 3 4 6 5 max3376e three-state i/o v l 1 i/o v l 2 1 + + + + 2 8 7 i/o v cc 1 v cc gnd v l i/o v cc 2 sot23-8 top view 3 4 6 5 max3372e max3373e three-state i/o v l 1 i/o v cc 1 1 2 8 7 i/o v l 2 v l gnd v cc *connect ep to gnd *connect ep to gnd *connect ep to gnd *connect ep to gnd i/o v cc 2 tdfn-8 (3mm x 3mm) top view 3 4 6 5 three-state i v l 1 o v cc 1 1 2 8 7 i v l 2 v l gnd v cc o v cc 2 tdfn-8 (3mm x 3mm) top view 3 4 6 5 three-state o v l 1 i v cc 1 1 2 8 7 i v l 2 v l gnd v cc o v cc 2 tdfn-8 (3mm x 3mm) top view 3 4 6 5 three-state o v l 1 i v cc 1 1 2 8 7 o v l 2 v l gnd v cc i v cc 2 tdfn-8 (3mm x 3mm) top view 3 4 6 5 + + + + *ep *ep *ep *ep pin configurations (continued)
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 23 maxim integrated pin configurations (continued) a 1 2 3 4 bc 12 ucsp (1.5mm x 2.0mm) bottom view v cc i/o v cc 1 i/o v cc 2 i/o v cc 3 i/o v l 3 i/o v l 2 i/o v l 1 v l i/o v cc 4 gnd i/o v l 4 three-state 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc o v cc 1 o v cc 2 o v cc 3 i v l 3 i v l 2 i v l 1 v l max3379e o v cc 4 n.c. three-state gnd n.c. i v l 4 tssop-14 top view a 1 2 3 4 bc 12 ucsp (1.5mm x 2.0mm) bottom view v cc o v cc 1 o v cc 2 o v cc 3 i v l 3 i v l 2 i v l 1 v l o v cc 4 gnd i v l 4 three-state 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 o v cc 2 o v cc 3 i v l 3 i v l 2 o v l 1 v l max3390e o v cc 4 n.c. three-state gnd n.c. i v l 4 tssop-14 top view a 1 2 3 4 bc 12 ucsp (1.5mm x 2.0mm) bottom view v cc i v cc 1 o v cc 2 o v cc 3 i v l 3 i v l 2 o v l 1 v l o v cc 4 gnd i v l 4 three-state 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i/0 v cc 1 i/0 v cc 2 i/0 v cc 3 i/o v l 3 i/o v l 2 i/o v l 1 v l max3377e max3378e i/0 v cc 4 n.c. three-state gnd n.c. i/o v l 4 tssop-14 top view 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i/0 v cc 1 i/0 v cc 2 n.c. n.c. i/o v l 2 i/o v l 1 v l i/0 v cc 3 gnd i/o v l 4 i/o v l 3 tdfn-14 (3mm x 3mm) top view three-state i/0 v cc 4 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc 0 v cc 1 0 v cc 2 n.c. n.c. i v l 2 i v l 1 v l 0 v cc 3 gnd i v l 4 i v l 3 tdfn-14 (3mm x 3mm) top view three-state 0 v cc 4 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 0 v cc 2 n.c. n.c. i v l 2 o v l 1 v l 0 v cc 3 gnd i v l 4 i v l 3 tdfn-14 (3mm x 3mm) top view three-state 0 v cc 4 + + + + + + *connect ep to gnd *connect ep to gnd *connect ep to gnd *ep *ep *ep
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 24 maxim integrated pin configurations (continued) a 1 2 3 4 bc 12 ucsp (1.5mm x 2.0mm) bottom view v cc i v cc 1 i v cc 2 i v cc 3 o v l 3 o v l 2 o v l 1 v l i v cc 4 gnd o v l 4 three-state 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 i v cc 2 i v cc 3 o v l 3 o v l 2 o v l 1 v l max3393e i v cc 4 n.c. three-state gnd n.c. o v l 4 tssop-14 top view a 1 2 3 4 bc 12 ucsp (1.5mm x 2.0mm) bottom view v cc i v cc 1 i v cc 2 i v cc 3 o v l 3 o v l 2 o v l 1 v l o v cc 4 gnd i v l 4 three-state 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 i v cc 2 i v cc 3 o v l 3 o v l 2 o v l 1 v l max3392e o v cc 4 n.c. three-state gnd n.c. i v l 4 tssop-14 top view 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 i v cc 2 o v cc 3 i v l 3 o v l 2 o v l 1 v l max3391e o v cc 4 n.c. three-state gnd n.c. i v l 4 tssop-14 top view a 1 2 3 4 bc 12 ucsp (1.5mm x 2.0mm) bottom view v cc i v cc 1 i v cc 2 o v cc 3 i v l 3 o v l 2 o v l 1 v l o v cc 4 gnd i v l 4 three-state 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 i v cc 2 n.c. n.c. o v l 2 o v l 1 v l 0 v cc 3 gnd i v l 4 i v l 3 tdfn-14 (3mm x 3mm) top view three-state 0 v cc 4 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 i v cc 2 n.c. n.c. o v l 2 o v l 1 v l i v cc 3 gnd i v l 4 o v l 3 tdfn-14 (3mm x 3mm) top view three-state 0 v cc 4 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc i v cc 1 i v cc 2 n.c. n.c. o v l 2 o v l 1 v l i v cc 3 gnd o v l 4 o v l 3 tdfn-14 (3mm x 3mm) top view three-state i v cc 4 + + + + + + *connect ep to gnd *connect ep to gnd *connect ep to gnd *ep *ep
max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp 25 maxim integrated chip information process: bicmos package information for the latest package outline information and land patterns (foot- prints), go to www.maximintegrated.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 8 sot23 k8sn+1 21-0078 90-0176 9 ucsp b9+2 21-0093 refer to application note 1891 12 ucsp b12+1 21-0104 refer to application note 1891 8 tdfn t833+2 21-0137 90-0059 14 tdfn t1433+2 21-0137 90-0063 14 tssop u14+1 21-0066 90-0113
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. 26 ________________________________maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 2013 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max3372e?ax3379e/max3390e?ax3393e ?5kv esd-protected, 1?, 16mbps, dual/quad low-voltage level translators in ucsp revision history revision number revision date description pages changed 0 1/02 initial release 1 12/06 addition of 12-bump ecsp packaging 2 11/07 addition of lead-free options 1, 20?1 3 1/13 updated packaging information; updated absolute maximum ratings 1, 2, 9, 20?3

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